Interface Definition
interface Mult_ifc; method Action start(int x, int y); method int result (); endinterface: Mult_ifc
Module Providing Mult interface
module mkMult1 (Mult_ifc); Reg#(int) product <- mkReg(0); Reg#(int) d <- mkReg(0); Reg#(int) r <- mkReg(0);
rule cycle (r != 0); if ((r&1) !=0) product <= product + d; d <= d << 1; r <= r >> 1; endrule
method Action start (x, y) if (r == 0); d <= x; r <= y; product <= 0' endmethod method result () if (r == 0); return product; endmethod endmodule: mkMult1
Output Ports from Multiplier Example
The diagram shows the inputs and outputs generated in the RTL, including the following handshaking signals:
- RDY_start An output which indicates that the start method can (safely) be called.
- EN_start An input which triggers the start method.
- RDY_result An output which indicates that the result value is valid.
Compiler commands
bsc mult1.bsv bsc -verilog -g mkMult1 mult1.bsv
Generated Verilog
The complete Multiplier example Verilog file for mkMult1
is generated using the above compiler commands. Below is the section of
the Verilog file showing how the interface methods are generated.
module mkMult1(CLK, RST_N, start_x, start_y, EN_start, RDY_start, result, RDY_result); input CLK; input RST_N; // action method start input [31 : 0] start_x; input [31 : 0] start_y; input EN_start; output RDY_start; // value method result output [31 : 0] result; output RDY_result; ... endmodule // mkMult1
|