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Register Updates

In Bluespec registers are considered atomic units with regard to their updates. That is, if any bit of a register is updated, then the entire register is considered updated. As an example, consider the follow code fragment. There are two rules which each update a separate byte of a 32 bit register. Bluespec semantics say that these two rules conflict, since both are updating the same register.

  Reg#(Bit#(32)) reg1 <- mkReg(0) ;

rule updateByte1 ( r1 ) ;
reg1[7:0] <= 8'd4 ;
endrule

rule updateByte3 ( r2 ) ;
reg1[23:16] <= 8'd5 ;
endrule

A better methodology is to define four 8-bit registers, and update the bytes a needed, if this is the intended behavior. This style of coding has been observed to have better synthesis results.

  Reg#(Bit#(8)) regA1 <- mkReg(0) ;
Reg#(Bit#(8)) regA2 <- mkReg(0) ;
Reg#(Bit#(8)) regA3 <- mkReg(0) ;
Reg#(Bit#(8)) regA4 <- mkReg(0) ;

rule updateByte1A ( r1 ) ;
regA1 <= 8'd4 ;
endrule

rule updateByte3A ( r2 ) ;
regA3 <= 8'd5 ;
endrule

Convenience functions can also be written to make the reading and writing of these registers easier.

  function Action updateRegA( Bit#(32) din ) ;
return
action
regA1 <= din[7:0] ;
regA2 <= din[15:8] ;
regA3 <= din[23:16] ;
regA4 <= din[31:24] ;
endaction;
endfunction

let regA = regA4, regA3, regA2, regA1 ;
...
rule updateAllRegA ( r5 ) ;
updateRegA( regA + 1 ) ;
endrule
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